Hardware IP Solutions

Compatible with Yaskawa Electric JL-100/JL-102 LSI

High-speed serial interface achieved using a lightweight protocol.

High-speed serial interface achieved using a lightweight protocol.

Next generation Sony CMOS image sensor interface.

SLVS-EC v3.0 Rx IP is an interface IP core that runs on Altera® FPGAs. Using this IP, you can quickly and easily implement products that support the latest SLVS-EC standard v3.0. You will also receive an "Evaluation kit" for early adoption.

IP core for FPGAs that supports “V-by-One® HS plus Standard”, the next-generation high-speed interface standard technology developed by THine Electronics Inc.

High-speed serial interface compliant with V-by-One® HS standard.